The present invention relates to a method of wet cleaning a surface, in particular a surface of a material of the silicon-germanium type, and especially of an Si1-xGex material where x is greater than 0 and less than 1, x preferably lying in the range from 0.1 to 0.9, more preferably from 0.1 to 0.7.
The technical field of the invention can in general be defined as that of the cleaning and decontamination of surfaces, in particular of surfaces of materials used in microelectronics, optics or electronics, especially surfaces of materials of the silicon-germanium alloy type, such as polished and crystalline Si1-xGex. The contaminants that may be on these surfaces may be of any type, namely particulate contaminants, organic contaminants, mineral contaminants, metallic contaminants, etc.
Specifically, the constant development in microelectronic integrated circuits based on CMOS silicon has been achieved thanks to the improvement in their performance and to the miniaturization of their elementary components. However, owing to the ever increasing density of interconnections, silicon would seem, in the near future, to be a major physical limitation. The SIA (Semiconductor Industry Association) roadmap has therefore anticipated the use of new materials. One of the materials exhibiting the greatest potential, with many integration options, for architectures of higher performance is germanium in the form of silicon-germanium alloys.
The material SiGe is deposited by epitaxy on silicon substrates. Thin silicon layers, called “silicon-under-tension” layers, may be deposited on these substrates. This silicon-under-tension on SiGe appears to be highly advantageous owing to the electronic properties that it confers on the elementary components, such as MOSFET (metal-oxide semiconductor field-effect transistor) or CMOS-type integrated circuit components.
The strained silicon may be a buried layer or a surface layer, and it greatly increases the electron mobility. Various processes have been described for forming this strained silicon on SiGe, using in particular the SOI (Silicon On Insulator) process.
Thus, several processes for fabricating these SiGe relaxed substrates have been described, such as for example in document [1]. One of their main characteristics is the presence of surface cross-hatching. Such cross-hatching stems from the presence of dislocations that form and propagate in a thick graded layer (with a thickness of several microns) at the base of these substrates. They are necessary in order for them to be almost completely relaxed, the purpose being to maintain the lowest possible defect density on the surface. As a result, this structure has, after epitaxy, a high surface roughness (several nm), which increases with the percentage of Ge in the alloy. Chemical-mechanical polishing (CMP) as described in document [2] is then necessary, before transfer of an SiGe layer or re-epitaxy of strained silicon, in order to eliminate this roughness and practically all the surface cross-hatching, so as to obtain a final surface roughness of less than 1 nm.
An optimized wet cleaning method is therefore of paramount importance after the CMP (chemical-mechanical polishing). It must be effective, so as to remove the contamination introduced by the polishing, composed especially of microparticles and nanoparticles, organic contamination and metallic contamination, without thereby degrading the initial surface morphology. This point is particularly important as regards relaxed SiGe substrates, which exhibit different chemical properties towards certain cleaning solutions commonly employed in microelectronics.
Thus, an SC1 (Standard Cleaning 1) solution, which constitutes part of the RCA (Radio Corporation of America) cleaning procedure, the most widely used at the present time on silicon and other materials, causes virulent etching of the SiGe surfaces. Even over short times and at low temperature, this treatment may create a surface microroughness, or even a major resurgence of surface cross-hatching, not compatible with the envisaged electronic applications. This sensitivity to SC1 but also SC2 (Standard Cleaning 2) solutions for germanium contents of greater than 50% depends on the percentage of germanium concentration of the alloy and on the temperature of the solution. The pronounced roughening effect of this type of solution on the surface of Si1-xGex substrates (where x=0.3 to 0.7) has been recently reported in document [3]. The use of such chemistries is here and now unacceptable for technological integration of SiGe materials with a high Ge content (≧30%).
A wet cleaning method aimed at overcoming the drawbacks of the conventional RCA cleaning procedure has been described in the literature in the case of silicon substrates. This is what is called the DDC (Diluted Dynamic Clean) method that relies fundamentally on the use of solutions of dilute chemicals, at room temperature, and combines two chemical baths prepared in quartz tanks, one of these baths, dedicated to the injection of chemicals, being recirculated and filtered.
This method is described in particular in documents [4] and [5] relating the pre-gate cleaning (i.e. gate oxide prediffusion cleaning) and is illustrated in FIG. 1. It employs a bath (1) in a rinsing tank (2), with an overflow (3), in which small quantities of reactants, such as hydrochloric acid or gaseous ozone, are injected together or alternately (at 4) into a stream of deionized water (5) that feeds the tank (6).
In FIG. 1, it should be noted that the reactants, such as HCl or O3, are injected (at 7) into the deionized water feed line (5) of the overflow tank (2), downstream of a static mixer (8) which is used to make the mixture of the deionized water and the reactants homogeneous thanks to the recirculation of the fluids as accomplished by the said static mixer (8).
The excess chemical bath of the tank is generally received by the overflow (3) and is discharged (9). Such a tank makes it possible for the cleaning method and the associated rinsing to be carried out alternately in the same bath. As a result, the space normally occupied by the rinsing bath may be eliminated. If the quantity of chemicals is negligible in the case of cleaning using dilute solutions, the overflow may be discharged directly in such a way that the substrates, for example the cleaned wafers, are always in contact with fresh reactants.
Another tank (10) contains a bath (11) consisting of a dilute solution, generally a 1% solution, of hydrofluoric acid in deionized water. This other tank comprises, so as to limit fluorinated discharges, a recirculation loop generally provided with a pump (12), a filter (13), an oxygen desorption device (14) in order to continuously eliminate the dissolved gases and a chemical purifier (15) in order to eliminate the noble metals. The oxygen collected is discharged via the line (16).
A wet cleaning sequence tailored to gate oxide prediffusion cleaning with silicon substrates therefore comprises the following successive steps:                treatment with deionized water containing 3 ppm O3 [4] or 20 ppm O3 [5], for 5 minutes in order to eliminate the noble metals and the organic compounds;        treatment with a 1% HF solution, acidified by 1% of HCl, for more than 0.5 minutes (overetch treatment) in order to eliminate the sacrificial oxide and the metals;        rinsing for 5 minutes with deionized water (without any other additive);        treatment with deionized water containing 3 ppm O3 for 10 minutes and then with the above-described HF/HCl solution for 1 minute, so as to eliminate the particles;        rinsing for 5 minutes with deionized water acidified by HCl; and        treatment with ozonized water containing 3 ppm O3 and acidified with 0.01% HCl, in order to carry out a final passivation.        
The drawbacks of the method of documents [4] and [5] applied to Si substrates are especially the following:
The etching of the silicon is very difficult to control, since silicon is very sensitive to etching by HF/HCl; the deoxidation time must be very accurately adjusted so as to prevent any roughening of the silicon; excessive consumption of silicon results in problems in the subsequent device fabrication process steps, such as alignment and layer deposition problems, and epilayer growth quality problems.
Moreover, the method of documents [4] and [5] is specifically designed for and tailored to gate oxide prediffusion cleaning on silicon substrates and surfaces, and the steps of this method, the succession of these steps, their duration and the specific reactants that are employed during each of the steps have been specifically optimized to eliminate contamination, whether this be of organic, metallic, particulate or other origin, of such substrates, specifically silicon substrates, and the effectiveness of this method has been demonstrated only in the case of silicon surfaces.
There therefore exists a need for a method of wet cleaning surfaces which is of higher performance and greater effectiveness for cleaning silicon substrates, and in particular there exists a need for a method of cleaning surfaces made of silicon-germanium alloy, for example Si1-xGex surfaces (where x is greater than 0 and less than 1, for example x ranging from 0.1 to 0.9) which, while ensuring very effective cleaning and allowing elimination of all contaminations, whether organic, metallic, particulate or of other type, is at least equivalent to that of the conventional RCA cleaning procedure, but does not have the drawbacks of the latter.
In other words, there exists a need for a method of wet cleaning surfaces, particularly surfaces made of silicon-germanium alloys, which is not only very effective and completely eliminates all the contaminants, but does not cause roughening of the substrate and the resurgence of surface cross-hatching.
This method must also be reliable, easy to implement, comprise a limited number of steps, be of relatively short duration, use small quantities of easily available reactants and reduce the amounts discharged into the environment.